consider a circuit where ur 8086 has to be activated only when certain condition is met. say the output of a logic circuit is low. the output pin of this device is connected to the gnd pin of 8086. when ever the out put pin is low there is a voltage diff between vcc and gnd pins of 8086 and 8086 is activated. so the logic device output pin acts a current sink. the sinking capacities of normal ttl devices are far less compared to the current sourced by a 8086 up. hence 2 gnd pins to split current from 8086 and ensure the current at gnd pin of 8086 does not exceed the sinking capacities of the peripherals.